Page 267 - DSP Integrated Circuits
P. 267
252 Chapter 6 DSP Algorithms
and distributive properties of the operations can be exploited to reduce the itera-
tion period bound.
As discussed in Chapter 5, the order of fixed-point two's-complement addi-
tions can be changed as long as the final sum is within the proper range. This
property can be used to reorder the additions, as illustrated in Figure 6.39, so that
the true minimum iteration period bound is obtained. Note that this bound can
also be found using the intrinsic coefficient word length concept [28].
Figure 6.39 Numerical equivalence transformation (associatively) used to reduce the
critical loop, a) Original signal-flow graph, b) Transformed graph with lower
iteration period bound
Distributivity does not itself reduce the iteration period bound, but it may make
other transformations feasible. An example of the use of distributivity is shown in
Figure 6.40. In some cases, it can be advantageous to duplicate certain nodes.
Figure 6.40 Illustration of the use of distributivity and associativity
Generally, the critical loops will contain only one addition and one
multiplication, but some structures may have loops that interlock in such a way
that rearranging the operations is hindered. We conclude that the iteration bound
is uniquely defined only for a fully specified signal-flow graph.