Page 446 - DSP Integrated Circuits

Problems 43

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European Conf. on Circuit Theory and Design, Warsaw, Poland, Sept. 1980.
[36] Wanhammar L.: Implementation of Wave Digital Filters Using Vectoi
Multipliers, Proc. First European Signal Processing Conf., EUSIPCO-8C
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[37] Wanhammar L.: ATI Approach to LSI Implementation of Wave Digital Filters
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[38] Wanhammar L., Afghahi M., and Sikstrom B.: On Mapping of Algorithm
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Espoo, Finland, pp. 1967-1970, June 1988.

PROBLEMS
9.1 Sketch an architecture for implementation of a complementary FIR filter
that uses only one PE of the multiplier-accumulator type. Determine also
the relevant system parameters when N = 128.
9.2 Modify the architectures shown in Figure 9.5 to compute
(a) The correlation function between two sequences
(b) The autocorrelation function
9.3 Describe the major steps in a systematic approach to implementing DSP
algorithms into an ASIC. In what sense is the approach optimal?

9.4 Show by an example that an isomorphic mapping of the signal-flow graph
onto hardware resources does not always yield a maximally fast
implementation. Also discuss resource utilization.
9.5 Propose a scheme based on a single, multiplexed vector-multiplier that
implements the bandpass filter discussed in Example 9.5.
9.6 Implement the wave digital lattice filter shown in Figure P9.6 using a
minimum number of vector-processors.
(a) Determine the appropriate set of difference equations using the
following adaptor coefficients:

For simplicity do not scale the filter.