Page 541 - DSP Integrated Circuits
P. 541
526 Chapter 11 Processing Elements
PROBLEMS
11.1 Two cascaded bit-parallel adders are used to add three values. The data word
length is 20 bits. Assume that the propagation times for the full-adders are
=
ns
''carry ''sum ~ ** -
(a) Determine the addition time.
(b) Introduce one level of pipelining and determine the new throughput and
latency.
11.2 Multiply the binary integers corresponding to the decimal numbers (15)io
and (-13)io using Booth's algorithm.
11.3 Determine the number range if the following moduli set is used in a residue
number system:
(a) {13,11,9,7,5,4}
(b) {32, 31, 29, 27, 25, 23,19}
11.4 (a) Show by an example that the sign-extension method used in the
serial/parallel multiplier in Figure 11.14 yields correct products. Use, for
example, the coefficient a= 1.1101 and x = 1.001.
(b) How much would the throughput increase if the serial/parallell
multiplier in Figure 11.14 is replaced by the one in Figure 11.44 when
the data word length is 16 bits.
11.5 Simplify the basic serial/parallell multiplier in terms of the number of D flip-
flops and full-adders for the coefficient (0.0101)20
(a) Draw the logic diagram for the minimized multiplier.
(b) Determine the required control signals.
(c) Determine the throughput when the data word length is 12 bits.
(d) Validate the function of the minimized multiplier by performing a
multiplication with the value x = (1.010) 2c-
11.6 Simplify the basic serial/parallell multiplier in terms of the number of D flip-
flops and full-adders, and draw its logic diagram when the coefficient is
represented in canonic signed digit code. The coefficient is or = (O.lOO-l)csDC-
11.7 A multiplication by a factor a = (1.11011)2c shall be implemented by using a
serial/parallell multiplier.
(a) Determine a schematic diagram for the multiplier with a general
coefficient.
(b) Simplify the multiplier in terms of number of D flip-flops and full-adders
and draw its logic diagram.
11.8 Find the simplest implementation of a serial/parallel multiplier with fixed
coefficient when the coefficient is
(b) (0.111011)2c
(a) (0.011001) 2C
(d) (1.011011) 2 c
(c) (1.011001) 2C
(f) (1.000001) 2c
(e) (0.000001) 2C
11.9 (a) Determine for the filter shown in Figure P11.9 the number of D flip-flops,
excluding the D flip-flops used in the bit-serial adders (subtracters)

