Page 18 - Engineering Digital Design

CONTENTS xvn

15.6 Perspective on the Pulse Mode Approach to FSM Design 795
Further Reading 796
Problems 797

16. Externally Asynchronous/Internally Clocked (Pausable) Systems
and Programmable Asynchronous Sequencers 805
16.1 Introduction 805
16.2 Externally Asynchronous/Internally Clocked Systems and Applications 806
16.2.1 Static Logic DFLOP Design 807
16.2.2 Domino Logic DFLOP Design 812
16.2.3 Introduction to CMOS Dynamic Domino Logic 814
16.2.4 EAIC System Design 816
16.2.5 System Simulations and Real-Time Tests 817
16.2.6 Variations on the Theme 820
16.2.7 How EAIC FSMs Differ from Conventional Synchronous FSMs 821
16.2.8 Perspective on EAIC Systems as an Alternative Approach to FSM
Design 822
16.3 Asynchronous Programmable Sequencers 823
16.3.1 Microprogrammable Asynchronous Controller Modules and
System Architecture 823
16.3.2 Architecture and Operation of the MAC Module 824
16.3.3 Design of the MAC Module 827
16.3.4 MAC Module Design of a Simple FSM 830
16.3.5 Cascading the MAC Module 832
16.3.6 Programming the MAC Module 833
16.3.7 Metastability and the MAC Module: The Final Issue 834
16.3.8 Perspective on MAC Module FSM Design 834
16.4 One-Hot Programmable Asynchronous Sequencers 835
16.4.1 Architecture for One-Hot Asynchronous Programmable
Sequencers 835
16.4.2 Design of a Four-State Asynchronous One-Hot Sequencer 837
16.4.3 Design and Operation of a Simple FSM by Using a Four-State
One-Hot Sequencer 838
16.4.4 Perspective on Programmable Sequencer Design and
Application 839
16.5 Epilogue to Chapter 16 842
Further Reading 842
Problems 844

A Other Transistor Logic Families 849
A. 1 Introduction to the Standard NMOS Logic Family 849
A.2 Introduction to the TTL Logic Family 850
A.3 Performance Characteristics of Important 1C Logic Families 852
Further Reading 852

B Computer-Aided Engineering Tools 855
B.I Productivity Tools Bundled with this Text 855
B.2 Other Productivity Tools 855
Further Reading 857