Page 380 - Engineering Digital Design

8.6 MULTIPLIERS 351

B 3. 0(H) A 3. 0(H)
Multiplicand A:
A 2 A 1 A 0
x B 3 B 2 B, B 0 Multiplier B,
P P P P
r
4x4 bit 03 02 01 00
P P P P
Multiplier '1 3 12 11 10 Partial Products P.,
P P P P
23 r 22 21 r 20
P P r P P
'3 3 32 31 30
P r P r P r P F P r P r P r P
r
7 6 5 4 3 2 l O
(a) (b)
FIGURE 8.16
Characteristics of the 4x4 bit multiplier, (a) Block circuit symbol, (b) Operation format showing
partial products and final product bits.

multiplication process consists of four multiplicand bits Aj, four multiplier bits B f, partial
product bits P tj, and the final eight product bits P k.
The 4 x 4 bit multiplication process, represented in Fig. 8.16b and by Example 2.27 in
Subsection 2.9.4, can be implemented at the modular level by using HAs and FAs to perform
the summation between the partial products and carries. Note that the partial products are
generated by AND operations Py = B, • A ;, and that the product bits in each column of
Fig. 8.16 are the sums of these partial products and the carries between stages as indicated
by the XOR operations in Fig. 8.17.
Some explanation of Fig. 8.17 may be helpful. Recalling the sum expression for an FA
in Eq. (8.2), it follows that k FAs can accommodate 2k XOR operators or 2k + 1 variables
in an XOR string such as that of Eq. (5.16). For 2k — I XOR operators in the string, use
can be made of one HA. Note that the C// symbols in Fig. 8.17 refer to carries from the zth
to the jth sum stage.
The product bits P, indicated in Fig. 8.17 can be computed by first generating the partial
products followed by a summation of these partial products with the appropriate carries.
This is done in Fig. 8.18, where six of the eight sum stages are shown separated by dotted

P = P
r
0 00
r
r p — p (ft p
r
i - oi * io
P — p ff> p fftp ff>n
" 2 ~ 02 w 11 ** '2 0 W 12
p
P 3 = P 03 ® 12 eP 21 eP 30 ©[C 23 ec 23 ']
P 4 = P 13 © P 22 e P 31 e [C 34 e c 3;© c 34"]
p s = P 23 eP 32 ©[C 45 ec 45 'ec 45 "]
P = P
6 33 ® [^56® ^Se'l
FIGURE 8.1 7
The summations of partial products and carries required to produce the product bits for the multipli-
cation of two 4-bit operands shown in Fig. 8. 16b.