Page 769 - Engineering Digital Design

14.14 ONE-HOT DESIGN OF ASYNCHRONOUS STATE MACHINES 735

Thus, the first part ("into" terms) of Eq. (14.40) represents m minimum NS functions as
derived, say, from K-map cover or from a minimization algorithm. This part is identical to
that appearing in Eq. (13.9) but with the appropriate symbol changes for the present and
next state variables. The second part ("out of" terms) of Eq. (14.40) functions to maintain
the state variable of the origin state active until the transition to the destination state is
complete. This forces the FSM to transit through a state with two 1 's, a state consisting of
1's from the origin and destination states. The r output functions summed over m states are
similar to those given by Eqs. (13.9) and are represented by

(14.41)

where fj,i(X) represents the y'th function of external inputs X for the /th output with
/ = 0, 1, 2, . . . , (r - 1). Note that Moore outputs result for any /_/,/(X) = 1.
Application of Eqs. (14.40) and (14.41) is remarkably simple since, as was pointed out
in Section 13.5, the NS and output functions can be read directly from the state diagram,
from an ASM chart or from a state table — and without the need for a state code assignment
or the use of K-maps. However, there are a few guidelines that must be followed in state
diagram (or state table) construction and initialization of a one-hot state machine:

1. Eliminate all buffer ("fly") states — there is no need for them in a one-hot design.
2. Cycles cause successive transitions between states with two 1's. This produces an
overlap in the two 1's states, resulting in a state variable pulse of short duration,
which may not be acceptable. Also an intermediate state in a cycle transition should
not be an output state, since it would create an output glitch. In short, avoid cycles in
one-hot designs. There is no need for them.
3. If a static hazard exists in the NS-forming logic, it is formed between the "out of"
term and an "into" term and is always an internally initiated static 1 -hazard in SOP
logic. Hazard cover is provided by the "into" holding condition term, which is usually
a reduced consensus term. Recall that the consensus term is the ANDed residue of
the coupled terms, as discussed in Sections 9.2 and 11.3 and in Subsection 14.10.3.
4. Initialization of one-hot designs must be accomplished according to Fig. 14.32a
together with a term that meets the requirements of the one-hot-plus-zero approach
discussed in Section 13.5. Thus, the idea here is to first set all y- variables to logic 0
and then force the FSM into a one-hot state where thereafter it can transition normally
from one one-hot state to another. No attempt should be made to initialize according
to Fig. 14.32b, because to do so will usually result in the activation of more than one
state on startup. Entrance into the intended one-hot routine of the FSM may not take
place until the inputs change in some favorable manner.
5 . Use the software A-OPS on the CD-ROM bundled with this text to automate the design
of any asynchronous one-hot FSM driven by a PLA or RAM. For more information
regarding the A-OPS software, refer to Appendix B.

As an example, and for reasons of comparison, consider the state diagram and state table
in Fig. 14.39, which are reproduced from Figs. 13.26 and 14.33 for the convenience of the