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734 CHAPTER 14/ASYNCHRONOUS STATE MACHINE DESIGN AND ANALYSIS

Which method should be used for STT FSM design, the nested cell approach or
the LPD approach? Both the nested-cell and the LPD approaches to asynchronous FSM
design are generally applicable to any fundamental mode FSM. However, for the nested
cell designs of an STT FSM, special methods must be used. The NS functions must be
converted from a valid set of Y f forms that are the result of the array algebraic approach.
The conversion process can be accomplished by either 7, -> 5,-, R, K-map conversions from
the Y ( forms or by algebraic means as was demonstrated in this section. Remember that to
avoid possible critical races and ORGs in an STT FSM design, it is necessary to use both
the partitioning methods and array algebraic approach that were discussed in Section 14.12.
Thus, the nested cell design of an STT FSM requires the extra step of converting the NS
LPD functions to S-R form . Once this is understood, the decision as to which approach
to use reduces to the following: An LPD STT approach generally results in a faster logic
circuit compared to a comparable nested cell design. However, an LPD design must deal
with the static hazard problem in the NS logic, the analysis of which can be complex but
can also be automated with some effort. For this approach, fan-in may become an important
consideration, particularly if discrete logic is to be used. In contrast, externally initiated
s-hazards in the NS logic of a nested cell design cannot affect the operation of the FSM, as
demonstrated later in Fig. 14.50. And by applying the requirements of Subsection 11.3.2
to the basic cell, internally initiated s-hazards are also avoided. Powerful software called
ADAM (see Appendix B) is bundled on CD ROM with this text. This software permits the
automated design of either LPD or nested cell designs of FSMs, defect-free.

14.14 ONE-HOT DESIGN OF ASYNCHRONOUS STATE MACHINES

The one-hot design of synchronous FSMs is discussed at length in Section 13.5. Table 2.11
gives a 10-bit one-hot code, a code consisting of a single "1" per state. A model is presented
in Fig. 13.23 and by Eqs. (13.9) that applies to the one-hot designs of synchronous FSMs
by using D flip-flops. Since the excitation tables for the LPD model and that for D flip-flop
designs are the same (see Fig. 14.3), it follows that Eqs. (13.9) also apply to the one-hot
design of asynchronous FSMs if the notation changes D-*Y and Q ->• y are made. The
following paragraphs demonstrate this.
In order to apply Eqs. (13.9) to the design of asynchronous one-hot FSMs, however,
it is necessary to add another term to the NS function equation. In a synchronous FSM,
the single active state variable in the origin state remains active until the transition to the
destination state is complete. This happens as a result of the action of the enabling input,
clock (CK). But because there is no enabling input such as CK controlling the transitions in
a fundamental mode FSM, some means must be found to maintain the active state variable
in the origin state constant (active) until the transition is complete to the destination state.
This is done by altering the NS functions in Eqs. (13.9) in the following way:

• (14.40)

"Out of" terms
"Into " terms
Here, Fj is the Boolean sum of all active j-variables in states to which the y'th state transits.