Page 182 - System on Package_ Miniaturization of the Entire System

Mixed-Signal (SOP) Design 157

architectures (e.g., WCDMA), which is more difficult to implement. The RF front end is
critical for the functioning of the radio module and therefore requires diplexers and a
high quality factor (Q) filters to manage interference. With the trend toward integration,
the transceiver section, which consists of low-noise amplifiers (LNAs), mixers, voltage-
controlled oscillators (VCOs), and modulators, is being integrated into a single die
using silicon-based CMOS processes. Because of power requirements, the power
amplifier (PA) is a separate die that is often implemented using gallium arsenide (GaAs).
For managing interference between the digital and RF ICs, the baseband processor and
memory that are implemented using digital CMOS are implemented as a separate die.
There is however a trend toward the integration of the transceiver with the baseband on
a single die, with the RF front end consisting of the antenna, switches, filters, and
matching networks outside of the die. Because of the high performance (quality factor,
insertion loss, sharp roll-off, and noise containment) required in the RF front-end
module, the components in this part of the architecture are often implemented using
discrete devices that limit the size of the handset. All the passive components required
in a handset that are difficult to integrate within the IC can now be embedded into the
package, thereby reducing the form factor and resulting in a SOP solution. The passive
devices that are required in a handset that can be embedded in the package include the
following: single-band and multiband antennas, diplexers consisting of low-pass and
high-pass filters, filter banks with bandpass characteristics, baluns that convert single-
ended signals into differential form and vice versa, matching networks, couplers,
inductors, and capacitors, to name a few. In addition, the package serves as a platform
that supports the ICs and, hence, performs the important role of protecting the die and
managing the thermal problems.

4.1.4 Mixed-Signal Design Challenges
Major challenges for the design of handsets with an SOP-based implementation include:
1. The design of highly integrated embedded components for the RF front end.
An example are diplexers that combine low-pass and high-pass filters on the
receive chain that minimize interference from adjacent frequency bands.
2. Chip-package codesign of active components with embedded components.
These include PAs, LNAs, and VCOs that have matching circuits, inductors,
and resonators embedded in the package.
3. Managing the analog-to-analog and digital-to-analog coupling. An example is
coupling through substrate, which causes interference between the digital and
RF ICs.
The parasitic inductance and capacitance of chip-package interconnects become
significant when they result in signal degradation at high frequencies. This becomes
significant for circuits like LNAs, VCOs, and PAs, which reside at the interface between
the package and chip domains. The back-and-forth transfer of signals between the
package and chip domain necessitates a design partitioning methodology to decide the
distribution of circuit components within the package or within the chip. The use of
multiple embedded passives in the substrate can also generate undesirable resonance
and feedback, jeopardizing the functionality of the system [6].
Integration at the package level leads to changes in priority at the design phase.
With the availability of high-Q passives embedded in the package, the number of lumped