Page 184 - System on Package_ Miniaturization of the Entire System

Mixed-Signal (SOP) Design 159

required to ensure efficient use of the packaging substrate. This has to be incorporated
into the design methodology of each circuit, for optimal system performance. As an
example, the design of completely integrated CMOS LNAs is possible by using
embedded passives in the package. However, the common CMOS LNA design
methodology has to be updated to take into account the tradeoff of a higher inductor
size for a higher Q.
With the high-sensitivity requirements for radio circuits necessitating the handling
of microwatts of input signal power, noise coupling from digital to analog domains has
become a major impediment to mixed-signal integration. Noise is generated in digital
circuits when many static gates change state simultaneously, causing a spike in current
flow through parasitic resistances and inductances in the circuit. This results in a spike
in the power supply, which can couple into the analog circuits through a common power
distribution system. The noise can also appear in analog circuits through capacitive
coupling to and from the highly doped silicon substrates used in SOC systems [13–22].
However, with the use of SOP-based schemes, new noise coupling and propagation
mechanisms come into play. With the use of power planes in the package for power
distribution, ground bounce and simultaneous switching noise (SSN) become important
factors in mixed-signal design. High-speed signal lines also end up radiating energy
due to common mode currents, resulting in electromagnetic interference (EMI). The
main digital-analog noise coupling mechanisms in mixed-signal SOP-based systems
can thus be summarized as follows: (1) through a common power supply, (2) through
EMI from high-speed signal lines, and (3) through capacitive or inductive coupling. The
low-loss power-distribution networks used in SOP-based systems produce sharp
resonances that do not exist in a higher-loss SOC-based power system [23]. In addition,
coupling within the analog signal domain through closely spaced multiple embedded
passives also results in performance degradation of the RF circuitry.
A major challenge in mixed-signal SOP design is the lack of design tools that can
accurately model, analyze, and evaluate complex effects such as signal integrity, power
delivery, crosstalk, radiation, quality factor, process variations, and yield. Along with
spanning the architectural, transistor, and layout level hierarchies, the tools have to
provide rapid turnaround time and therefore enable shorter design cycle time.

4.1.5 Fabrication Technologies
The design methodology used is a function of the technology chosen for fabrication.
This is because the chosen technology defines the process ground rules such as line
width, line thickness, dielectric thickness, via diameters, and stackups, which are
required for physical implementation. For mobile applications, cost-effective solutions
are required that provide a significant improvement in size, performance, and reliability.
Currently, five different technology platforms are available for integration in mobile
applications, namely, (1) use of discrete passive components on printed wiring boards
(PWBs), (2) system-on-chip (SOC) where all the passive and active devices are integrated
into silicon, (3) low-temperature cofired ceramic (LTCC), (4) thin film on silicon (TFOS),
and (5) use of PWB-based organic processes. Since, the package and the PWB can be
combined using similar material sets using the last option, this technology has gained
in importance lately. Table 4.1 provides a qualitative comparison of the five approaches
without providing much detail, purely from a design standpoint. In this chapter, design
implementations using the PWB-based organic processes with liquid crystalline
polymer (LCP) dielectric materials have been discussed.