Page 48 - System on Package_ Miniaturization of the Entire System

Intr oduction to the System-on-Package (SOP) Technology 25

Antennas are another example that cannot be integrated on silicon due to size
restrictions [20, 22–25]. Another example involves RF circuits that function in the microvolt
range. Integration of dissimilar signals requires large isolation between them. On standard
silicon, a major concern is substrate coupling caused by the finite resistivity of the silicon
substrate. Though solutions have been proposed using high-resistivity silicon or N-well
trenches, the isolation levels achieved are insufficient. For multiple voltage levels,
distributing power to the digital and RF circuits while simultaneously maintaining
isolation and low electromagnetic interference (EMI) can be a major challenge [26].
These issues can be addressed quite easily with SOP using embedded filtering and
decoupling technologies [27–31]. The SOP has already been demonstrated with Q
values in the range of 100 to 400 using low-loss dielectrics and copper metallization
structures that enable low-power solutions. With advances in digital processing speeds,
embedded optical waveguides in the package have the potential of bringing photonics
directly into the processor. This integration in the package can eliminate the serialization
and deserialization of data and therefore provide a compact platform for integration
with higher data bandwidth. In synchronous systems that support large ICs, a major
problem is the clock skew between various logic circuits on silicon. A potential solution
for such problems is the use of embedded optical clock distribution in the package,
which is immune to most noise sources [32–41].
The SOC, MCM, and SIP described above have one major shortcoming. They extend
Moore’s law in two or three dimensions. They address only 10 to 20 percent of system
needs and depend on CMOS only for system functions and on packaging for
interconnection only. This leads to bulky systems, not because of ICs but because of the
lack of system miniaturization. This single-chip CMOS focus at the system level, over
the long run, presents fundamental limits to digital systems and integration limits to RF
and wireless systems. Thus, while CMOS is good for transistors and bits and certain
other components, such as Power Amplifier (PA) and Low Noise Amplifier (LNA), it is
not an optimal technology platform for certain other components such as antennas,
MEMS, inductors, capacitors, filters, and waveguides.
The SOB, on the other hand, shows its strengths in those areas where SOC is weak
but suffers in those areas such as electrical performance and power usage where SOC
shines. The SIP is a good tradeoff between these two technologies, and at the same
time it is at the heart of semiconductor companies and their need to manufacture
as much silicon as possible to justify their wafer fabrication investments. In addition,
the SIP addresses the wireless cell phone “sweet spot” application. Therefore, it is
not surprising that almost all major IC companies are manufacturing these modules.
The major weakness of SIP is that it addresses the system drivers at the module level
only and not at a system level. The 80 to 90 percent of the system problems remains
unanswered.
The SOP is an even better and more optimized system solution than SIP, as can be
seen from Figure 1.24. It addresses at the IC level without compromise by means of both
on-chip SOC integration and package-enabled SIP and 3D integration and at the system
level by system miniaturization technologies such as power supplies, thermal structures,
and passive components, as indicated previously in Figures 1.5 and 1.9b for digital, RF,
optical, and sensor components. Unlike SOC, however, no performance compromises
have to be made in order to integrate these disparate technologies since each technology
is separately fabricated either in the IC or the package and subsequently integrated into
the SOP system package. System design times are expected to be much shorter in the
SOP concept, as it allows for greater flexibility with which to take advantage of emerging