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                                          COPPER, LOW-k DIELECTRICS, AND THEIR RELIABILITY

                                                                COPPER, LOW-κ DIELECTRICS, AND THEIR RELIABILITY  4.3

                                          Resistivity (µΩ-cm)
                                          8


                                          6                                        5.6     5.5


                                          4
                                                2.7
                                                                 2.4
                                          2              1.6              1.7


                                          0
                                                Al       Ag      Au       Cu       Mo       W
                                          FIGURE 4.2  Resistivity of different metallizations.

                                  Here one can see the higher diffusivity of copper compared to aluminum. It is also susceptible to
                                  corrosion. Hence interconnects have to be encapsulated by diffusion barriers on the base and side
                                  walls along with capping layers on top. Different materials have been researched as potential diffusion
                                  barriers for copper metallization. 4,7,8,9  Typically refractory metal alloys have proven to be good barriers
                                  against copper diffusion. Materials like Ta/TaN, TiN, TiSiN, and TiW can be used for this purpose.
                                  Certain qualities are desired of a good liner material. Besides being a diffusion barrier, it should have



                                                  Elch slop
                                                (silicon nitride)



                                                                     (a)



                                                        Via                    Line
                                                                   Insulator
                                                                                     Via
                                                      (b)                          (c)

                                                                   Barrier



                                                                  Seed layer


                                                      (d)       Plated metal       (e)
                                               FIGURE 4.3  Process steps for the fabrication of a via and line level by the
                                               dual-damascene approach. 2


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