Page 181 - The Art and Science of Analog Circuit Design
P. 181

Jim Williams


        extent with the lamp's characteristics. C2 ballasts the lamp, effectively
        buffering its negative resistance characteristic. Small values of C2 provide
        the most load isolation, but require relatively large transformer output
        voltage for loop closure. Large C2 values minimize transformer output
        voltage, but degrade load buffering. Also, Cl's "best" value is somewhat
        dependent on the lamp type used. Both Cl and C2 must be selected for
        given lamp types. Some interaction occurs, but generalized guidelines are
        possible. Typical values for Cl are O.OljiF to .15uF. C2 usually ends up in
        the lOpF to 47pF range. Cl must be a low-loss capacitor and substitution
        of the recommended devices is not recommended. A poor quality dielec-
        tric for Cl can easily degrade efficiency by 10%. Cl and C2 are selected
        by trying different values for each and iterating towards best efficiency.
        During this procedure, ensure that loop closure is maintained by monitor-
        ing the LT1172's feedback pin, which should be at 1.23V. Several trials
        usually produce the optimum Cl and C2 values. Note that the highest
        efficiencies are not necessarily associated with the most esthetically pleas-
        ing waveshapes, particularly at Ql, Q2, and the output.
           Other issues influencing efficiency include lamp wire length and en-
        ergy leakage from the lamp. The high voltage side of the lamp should
        have the smallest practical lead length. Excessive length results in radia-
        tive losses, which can easily reach 3% for a 3 inch wire. Similarly, no
        metal should contact or be in close proximity to the lamp. This prevents
        energy leakage, which can exceed 10%. 4
          It is worth noting that a custom designed lamp affords the best possi-
        ble results. A jointly tailored lamp-circuit combination permits precise
        optimization of circuit operation, yielding highest efficiency.
           Special attention should be given to the layout of the circuit board,
        since high voltage is generated at the output. The output coupling capaci-
        tor must be carefully located to minimize leakage paths on the circuit
        board. A slot in the board will further minimize leakage. Such leakage
        can permit current flow outside the feedback loop, wasting power. In the
        worst case, long term contamination build-up can increase leakage inside
        the loop, resulting in starved lamp drive or destructive arcing. It is good
        practice for minimization of leakage to break the silk screen line which
        outlines transformer Tl. This prevents leakage from the high voltage
        secondary to the primary. Another technique for minimizing leakage is to
        evaluate and specify the silk screen ink for its ability to withstand high
        voltages.






           A very simple experiment quite nicely demonstrates the effects of energy leakage. Grasping the
           lamp at its low-voltage end (low field intensity) with thumb and forefinger produces almost no
           change in circuit input current Sliding the thumb-forefinger combination towards the high-
           voltage (higher field intensity) lamp end produces progressively greater input currents. Don't
           touch the high-voltage lead or you may receive an electrical shock. Repeat: Do not touch the
           high-voltage lead or you may receive an electrical shock.
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