Page 182 - The Art and Science of Analog Circuit Design

Tripping the Light Fantastic

Efficiency Measurement

Once these procedures have been followed efficiency can be measured.
Efficiency may be measured by determining lamp current and voltage.
Measuring current involves measuring RMS voltage across a temporarily
inserted 200Q .1 % resistor in the ground lead of the negative current
steering diode. The lamp current is
ERMS .
Ilamp = x 2
200
The x2 factor is necessitated because the diode steering dumps the cur-
rent to ground on negative cycles. The 200O value allows the RMS meter
to read with a scale factor numerically identical to the total current. Once
this measurement is complete, the 200Q resistor may be deleted and the
negative current steering diode again returned directly to ground. Lamp
RMS voltage is measured at the lamp with a properly compensated high
voltage probe. Multiplying these two results gives power in watts, which
may be compared to the DC input supply E x I product. In practice, the
lamp's current and voltage contain small out of phase components but
their error contribution is negligible.
Both the current and voltage measurements require a wideband true
RMS voltmeter. The meter must employ a thermal type RMS converter—
the more common logarithmic computing type based instruments are
inappropriate because their bandwidth is too low.
The previously recommended high voltage probes are designed to see
a lM£l~10pF-22pF oscilloscope input. The RMS voltmeters have a 10
meg O input. This difference necessitates an impedance matching net-
work between the probe and the voltmeter. Details on this and other effi-
ciency measurement issues appear in Appendix A, "Achieving
Meaningful Efficiency Measurements."

Layout

The physical layout of the lamp, its leads, the display housing, and other
high voltage components, is an integral part of the circuit. Poor layout can
easily degrade efficiency by 25%, and higher layout induced losses have
been observed. Producing an optimal layout requires attention to how
losses occur. Figure 11-22 begins our study by examining potential para-
sitic paths between the transformer's output and the lamp. Parasitic capac-
itance to AC ground from any point between the transformer output and
the lamp creates a path for undesired current flow. Similarly, stray cou-
pling from any point along the lamp's length to AC ground induces para-
sitic current flow. All parasitic current flow is wasted, causing the circuit
to produce more energy to maintain the desired current flow in Dl and
D2. The high-voltage path from the transformer to the display housing
should be as short as possible to minimize losses. A good rale of thumb is
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