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3.4 / BUS INTERCONNECTION 89

Local bus
Processor Cache

Local I/O
controller
Main
memory

System bus

Network Expansion
bus interface Serial
SCSI
Modem

Expansion bus
(a) Traditional bus architecture

Main
memory

Local bus Cache/
Processor System bus
bridge

SCSI FireWire Graphic Video LAN

High-speed bus

FAX Expansion
bus interface Serial
Modem

Expansion bus
(b) High-performance architecture
Figure 3.18 Example Bus Configurations

independent of the processor. Thus, differences in processor and high-speed bus
speeds and signal line definitions are tolerated. Changes in processor architecture
do not affect the high-speed bus, and vice versa.

Elements of Bus Design

Although a variety of different bus implementations exist, there are a few basic pa-
rameters or design elements that serve to classify and differentiate buses. Table 3.2
lists key elements.