Page 438 - DSP Integrated Circuits

9.9 FFT Processor, Cont. 423

architecture Behv_Stage_process of Stage_process is

begin
if Start_in = True then
Do_out := Input;
N s := N;
while N s > 1 loop
N s := N s/2;
N s_out := N s;
Do_out := FFTStage;
end loop;
Do_out := Output:
Finished_out := True;
end if;
end Stage_process;

Box 9.3 Behavior of the Stage process

architecture Behv_Bas_Index_Gen of Base_Index_Gen is
begin
if Do_in = Input then
for m in 0 to N - 1 loop
i_out := m mod(N/2);
P_out := P(m);
end loop;
end if;
if Do_in = FFTStage then
for m_binary in 0 to ((N/4)-l) loop
m := GrayCode(mJbinary)
ki_out := 4*N s_in*(m/N s_in) + m mod(Ns_in);
P_out := P(m);
end loop;
end if;
if Do_in = Output then
for m in 0 to N - 1 loop
i2_out := m mod(N/2);
P_out := P(m);
end loop;
end if;
end Base_Index_Gen;

Box 9.4 Behavior of the base index generator

architecture Beh_Address_Gen_0 of Address_Gen_0 is
begin
if Do_in = Input then
if P_in = 0 then
A_out := i_in;
end if;