Page 452 - DSP Integrated Circuits

10

DIGITAL SYSTEMS

10.1 INTRODUCTION

As discussed in Chapter 1, large systems are generally, for reasons of complexity,
partitioned into a hierarchy of subsystems. The lower levels of the hierarchy are
typically mapped directly onto hardware structures while higher-level functions
are implemented as virtual machines built of combinations of software and hard-
ware. Most digital systems are designed to have a hierarchical organization that
mirrors the system hierarchy, as illustrated in Figure 10.1.
The architectural components used to build such virtual machines, as well as
the digital hardware modules, are PEs, ICNs, memories, and control units. Com-
plex hardware modules can normally be decomposed into a set of simpler modules.
For example, a vector-multiplier may be decomposed successively into multipliers,
adders, buses, registers, and finite-state machines (FSMs) down to full-adders,
flip-flops, and even wires. At the lowest-level gates, transistors, wires, simple
memory elements, and clocks are used as basic entities. Notice also that memories
can be similarly decomposed into PEs, ICNs, memories, and control units (decod-
ers, I/O circuitry, basic memory elements, clocks). The communication parts may
differ slightly since, at the lowest level, they are decomposed into switches, wires,
and clocks.
A logic function is implemented by execution of some logic algorithm which
consists of a sequence of elementary logic functions operating on binary data. The
algorithm may be fully sequential or consist of a combination of sequential and
recursive operations.
The task of specifying the gates and their interconnections to implement a
given behavior generally involves a large amount of work. Often, this work equals
or exceeds the work required in the VLSI design phase. However, the use of auto-
matic synthesis tools may change this in the near future.
In this chapter, we will discuss some general aspects of digital systems. In
particular, we will discuss different approaches to decompose a logic function into
manageable pieces that can more easily be designed to meet specified area and
speed requirements. Another important issue discussed will be the various clock-
ing regimes used in digital systems.

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