Page 176 - Embedded Microprocessor Systems Real World Design

In processors that have a hardwired stack, you must limit the levels of ISRs or
the stack will overflow. You cannot pass parameters on the stack (at least not very
many) for the same reason.
The context switching registers described in Chapter 4 can be used for inter-
rupts. For example, the 8051 has four independent register banks. One could be
used for the polling loop, one for subroutines, and two for interrupts. For proces
sors that have this capability, remember that common registers must be saved just
like in a subroutine. Going back to the 8051, for example, there is only one accu-
mulator register, so the ISRs must push it onto the stack. Of course, any register
save method that works for a subroutine will work for an ISR.

Nested Interrupts

Any time an interrupt occurs, there is a possibility that a second interrupt will occur
right after the first ISR begins executing. If this happens, the second ISR can-
not execute until the first ISR finishes executing. Say you have a system with two
asynchronous, unrelated interrupts. One of the interrupts does nothing but toggle
a port bit. If you hook an oscilloscope to that port bit, you will find that the edge-
toedge timing varies by an amount equal to the execution time of the first ISR
(plus any time that interrupts are disabled for other reasons).
As I mentioned earlier, some processors allow interrupts to be nested, which
allows an ISR to itself be interrupted by another interrupt. The simplest method
of interrupt nesting is to allow any ISR to be interrupted by any other. The other,
more complex, method is to allow an ISR to be interrupted only by a higher-
priority interrupt.
Interrupt nesting normally is used when a high-priority interrupt cannot
wait. Without nesting, the lowest-priority interrupt becomes the highest while it is
executing. Many microprocessors and microcontrollers disable all interrupts as
soon as an ISR is executed. To use nested interrupts, the interrupt routines that
you want to make interruptible must reenable interrupts as soon as they begin
execution.
If your design requires interrupt nesting, there are some special considerations:
Stack Size. The first consideration is stack size, which becomes important if
interrupts are nested. If you have an eight-level stack and nine levels of
interrupts, you have an obvious problem.
Limited Register Sets. Context switching, as I mentioned earlier, can be a
problem, depending on how many levels you have. I have designed several
boards using the ADSP-2101 family parts, and all these designs use the

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