Page 174 - Embedded Microprocessor Systems Real World Design

Daisychained interrupts have one disadvantage-they cannot be individually
masked at the processor. If the peripheral logic has no provision to mask the inter-
rupt, there is no way for the processor to ignore that interrupt when performing
a high-priority task that cannot be interrupted. Be sure this is not a problem with
the system design. If it is, some mechanism must be added to allow the processor
to individually mask the peripheral interrupts.
The 68000 family parts, as mentioned earlier, have encoded interrupt lines. Most
peripheral ICs have only one interrupt output. If you are interfacing just one of
these to a 68000 family processor or other processor with encoded interrupt lines,
you can wire-OR the lines to get the priority that you want. However, if there is
more than one peripheral and you need more than one priority level, you must
drive the lines individually, through buffers.
Some peripheral ICs (such as the Z853x parts) require that INTA or other signals
be synchronized to a clock. Be sure you work out this timing and add wait states if
necessary.

More than any other single thing, the handling of interrupts is probably what sets
real-time embedded software apart from other microprocessor-based software.
If interrupts are used, the software must initialize the hardware. This means
enabling the interrupts, loading the interrupt vector table into RAM (if required),
programming vectors (in peripherals with that feature), and selecting any other
relevant parameters (such as the edge/level mode). It is important that interrupts
not actually be enabled until everything else is set up. If an interrupt occurs before
the vector table is loaded into RAM, the results will not be good.

Interrupt Service Mechanics

When an interrupt occurs, the ISR is executed. All IS% must perform three actions:

Service the hardware that generated the interrupt.
Enable the system to accept further interrupts.
Return control to the point at which the interrupt occurred.
The only exceptions to this are terminal interrupts, such as NMI, that can be used
to signal the processor to stop due to an error.
Servicing the hardware that generated the interrupt means clearing the inter-
rupt request, if necessary, and processing whatever caused the request. The pool

Intm-upts in Embedded System 155