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alternate register set for interrupts. On these designs, I did not need interrupt
                    nesting, so I always know that the alternate set is available to an ISR when it is
                    executed. By  definition, any previous ISRs have completed before the next
                    one begins. However, if you need to nest interrupts and you have more
                    interrupts than you have alternate register sets, then you must use another
                    method to save the context.
                    Jitter. Nesting interrupts does not eliminate jitter  (variation in interrupt
                    response time caused by latency of other interrupts), but it does reduce it.
                    Jitter is not completely eliminated because there is still some time required for
                    the hardware to execute the interrupt and for the first ISR to save the CPU
                    context and then reenable interrupts. In effect, the amount of time that
                    interrupts are disabled is not the execution time of the ISR, but the execution
                     time of the ISR up to the point that interrupts are reenabled.
                    Priority Tradeoff. Suppose you have that two-interrupt system we  mentioned a
                    few paragraphs back and you decide to make the port bit toggle more stable
                    by nesting it with the first interrupt. You reenable interrupts inside the first
                    ISR so the port bit ISR gets to execute if its interrupt occurs. You look at the
                    port bit on an oscilloscope and see that it is now more stable than before.
                    However, what you can’t see is that the first interrupt now has increased
                    latency. The first ISR must stop executing if the second interrupt occurs, and
                    does not resume until the second ISR is finished.




                  Passing Data to or from the ISR


                  When it occurs, an interrupt is an asynchronous event. The polling loop can be
                  doing anything, executing any instruction, at the time. Unlike a subroutine call,
                  the ISR cannot pass information to the polling loop in a register, unless that reg-
                  ister is unused by  the polling loop and by all other interrupts. The usual method
                  of passing information from the ISR is via buffers and semaphores. The pool timer,
                  for example, uses the flags shown in Table 5.2 to pass information from the inter-
                  rupt to the polling loop.
                    The interrupt routine sets these flags and the polling loop resets them after they
                  are recognized. The pool timer does not pass specific parameters from the polling
                  code to the ISR, but the ISR does use values set by the polling loop: the initial ON
                  and OFF times, loaded when time rolls over, for example.









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