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288 CHAPTER 6 / NONARITHMETIC COMBINATIONAL LOGIC DEVICES
[5] J. F. Wakerly, Digital Design Principles and Practices, 2nd ed. Prentice-Hall, Englewood Cliffs,
NJ, 1994.
The usual combinational logic devices such as MUXs, decoders, code converters, and
comparators are covered adequately by most texts, including those just cited, but the texts
by Tinder and Wakerly provide what is perhaps the best coverage of the group.
Steering logic seems to be covered adequately in only a few texts, among which are
those of Hayes and Katz.
[6] J. P Hayes, Introduction to Digital Logic Design. Addison Wesley, Reading, MA, 1993.
[7] R. H. Katz, Contemporary Logic Design. Benjamin/Commings Publishing, Redwood City, CA,
1994.
There are numerous texts and reference books on VHDL. For instructional purposes the
texts of Dewey, Navabi, Pellerin and Taylor, Perry, Roth, and Skahill are good choices. The
texts by Pellerin and Taylor and by Skahill include CD-ROMs containing fully functional
VHDL compilers. The text by Dewey is somewhat unusual in that it nicely combines digital
design and analysis with VHDL.
[8] A. M. Dewey, Analysis and Design of Digital Systems with VHDL. PWS Publishint Co., Boston,
1997.
[9] Z. Navabi, VHDL Analysis and Modeling of Digital Systems. McGraw-Hill, New York, 1993.
[10] D. Pellerin and D. Taylor, VHDL Made Easy. Prentice Hall PTR, Upper Shaddle River, NJ, 1997.
[11] P. J. Ashenden, The Designer's Guide to VHDL, Morgan Kaufmann Publishers, San Francisco,
CA, 1996.
[12] C. H. Roth, Jr., Digital Systems Design Using VHDL. PWS Publishing Co., Boston, 1998.
[13] K. Skahill, VHDL for Programmable Logic. Addison-Wesley, Reading, MA, 1996.
The latest VHDL IEEE standard is the 1076-1993 standard. Standard 1076 has been
augmented by standards 1164, 1076.3 and 1076.4. These latest standards are identified as
follows:
Standard 1076-1993, IEEE Standard VHDL Language Reference Manual, IEEE,
1994.
Standard 1164-1993, IEEE Standard Multivalue Logic System for VHDL Model
Interoperability, IEEE, 1993.
Standard 1076.3, VHDL Synthesis Packages, IEEE, 1995.
Standard 1076.4, VITAL ASIC Modeling Specification, IEEE, 1995.
These IEEE documents can be obtained from IEEE at the following address: IEEE Service
Center, 445 Hoes Lane, PO Box 1331, Piscataway, NJ 08855-1331 (Phone: 1-800-678-
IEEE).
PROBLEMS
6.1 The propagation delays for a state-of-the-art CMOS logic gate are calculated to be
T pi h = 0.25 ns and T PM = 0.35 ns with a power dissipation of 0.47 mW. Calculate the
power-delay product (PDP) in picojoules predicted for this gate.