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8.8 ARITHMETIC AND LOGIC UNITS 357

portion of the array that is used. However, to do this requires proper placement of O's on
modules that are not used. For example, if m = n, only one quotient bit is generated and
O's must be placed on all open inputs to the right of the MSB column of the array.
Dividers of the type shown in Fig. 8.23 can be classified as "fast" dividers. This is because
they are asynchronous in nature, meaning that the results are generated as fast as the logic
permits. However, it is characteristic of such circuits that with increasing operand size the
hardware requirements increase rapidly making them impractical for many applications
where space requirements are important. There are other methods of achieving the division
operation with less hardware but at the expense of operation time, as expected. These
methods require storage elements such as registers and fall outside the treatment of this text.

8.8 ARITHMETIC AND LOGIC UNITS

As the name implies, the arithmetic and logic unit (ALU) is a universal combinational
logic device capable of performing both arithmetic and logic operations. It is this versatility
that makes the ALU an attractive building block in the central processing unit (CPU) of
a computer or microprocessor. It is the object of this section to develop the techniques
required to design and cascade ALU devices following three very different approaches: the
dedicated ALU approach, the MUX approach, and the dual-rail approach with completion
signals.
The number and complexity of the operations that a given ALU can perform is a matter
of the designer's choice and may vary widely from ALU to ALU, as will be demonstrated
in this section. However, the choice of operations is usually drawn from the list in Fig. 8.24.
Other possible operations include zero, unity, sign-complement, magnitude comparison,
parity generation, multiplication, division, powers, and shifting. Multiplication, division,
and related operations such as arithmetic shifting are complex and are found only in the
most sophisticated ALU chips. Also, the AND, OR, and XOR operations are often applied
to complemented and uncomplemented operands, making possible a wide assortment of
such operations.
Presented in Fig. 8.25 is the block diagram symbol for a general n-bit slice ALU. This
ALU accepts two n-bit input operands, B n-\ • • • B\BQ and A n-\ • • • A\AQ, and a carry-in
bit, Ci n, and operates with them in some predetermined way to output an n-bit function,
F,,_i • • • F\FQ and a carry-out bit, C out. Here, the term n-bit slice indicates a partition of
identical n-bit modules of stages that can be cascaded in parallel. Thus, an FA in an n-bit
R-C adder could be called a 1-bit slice for that adder. Also, use of sign-complement arith-
metic avoids the need for both carry and borrow parameters.

Arithmetic Operations Logic Operations
Negation Transfer
Increment Complementation
Decrement AND
Addition OR
Subtraction XOR (EQV)
FIGURE 8.24
Arithmetic and logic operations common to ALUs.