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CHAPTER 12








                  Module and Bit-Slice Devices









                  12.1  INTRODUCTION
                  In Chapter 10 use was made of both the basic cell and the flip-flop as the memory in the de-
                  sign of relatively simple state machines such as other flip-flops and a sequence recognizer. In
                  Section 11.9 use was again made of flip-flops as memory devices in the design of a more com-
                  plex FSM, the one- to three-pulse generator. In this chapter, devices such as shift registers
                  and counters are considered. Registers and counters constitute two very important classes
                  of FSMs that are functionally different, and that are commonly used in the following ways:

                    As stand-alone devices
                    As data path devices in a controlled system
                    As memory devices in controller design

                  As will become evident, there is a variety of different types of shift registers and even a
                  greater variety of counters, some relatively simple and some relatively complex. Where
                  applicable, use will be made of the modular approach to register and counter design,
                  meaning that the modules can be cascaded into larger units. After completing this chapter the
                  reader will be familiar with the design and operation of almost any shift register or counter.



                  12.2  REGISTERS

                  For reference purposes, there are four modes of bitwise register operation:

                    True Hold a logic 0 or logic 1
                    Shift Right a logic 0 or logic 1
                    Shift Left a logic 0 or logic 1
                    Parallel Load a logic 0 or logic 1

                  Not all shift registers are designed to operate in all four modes. The simplest register, one
                  that can neither shift nor true hold, is called the storage (holding) register. The condition
                  whereby a device can sustain any set of logic output values over any number of clock cycles
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