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666 CHAPTER 13 / ALTERNATIVE SYNCHRONOUS FSM ARCHITECTURES

13.6.3 Perspective on System-Level Design in This Text

System-level designs can connote a different meaning to different designers. To some,
system-level design might refer strictly to a combinational system. Or to others, it might
mean the design of a microprocessor or computer. In the sense used in this text, a system-
level design will always imply the presence of a controller unit (CU) and a controlled
system called the data path unit (DPU). The CU will always be an FSM, which must not
be confused with the CPU or central processing unit of a microprocessor or computer.
Commonly, the CPU contains both a CU and a DPU; the DPU (or execution unit, EU)
typically consists of registers, shifters, and an ALU. The design of microprocessors and
computers will not be covered in this text. It is the philosophy of the author that digital
design fundamentals and the design of microprocessors and computers cannot be treated
effectively within a single text. Further Reading at the end of this chapter cites references
on the subject of microprocessor and computer design for the reader wishing to develop in
that direction.
In system-level designs, the CU and DPU take on an entirely different identity and
functionality and may differ greatly in their individual hardware requirements. In one case
the DPU may be far more complex in its hardware makeup than the CU, while in other
cases the reverse may be true. Two illustrative examples of system-level design have been
presented in Subsections 13.6.1 and 13.6.2. Both are examples of the case where the DPU
is more complex hardware-wise than the CU. There are, of course, many more examples
of system-level design that could be offered in this section, and each could be used to
illustrate specific facets of the design process and involve system designs both larger and
smaller than those previously presented. This, however, is not practical given the space
limitation of a text, and would take up space at the expense of other important subject
matter. Learning how to design at the system level requires practice, practice, and more
practice — there is no substitute for practical experience in this field. Threrefore, as an
alternative, other illustrative system-level design problems are provided in the problem
section to this chapter. And to help the reader in the decision-making process for these
problems, a few suggestions are offered regarding hardware, input conditioning, and so on.
Again, it is emphasized that these problems are all open-ended in the sense that they have no
single best solution. Consequently, the reader's design skills and engineering intuition can
be exercised within the limits provided by the description of the problem. But, the instructor
can also permit greater latitude in arriving at an acceptable solution — all under the heading
of "variations on the theme." This attitude toward design can be quite rewarding to both
student and instructor alike.

13.7 DEALING WITH UNUSUALLY LARGE CONTROLLER
AND SYSTEM-LEVEL DESIGNS

In using the model given in Figure 13.1, it is assumed that both the NS- and output-forming
logic functions for a controller FSM can be handled by a single nonregistered PLD. In
the event that this is not the case and the controller requirements exceed the limitations
of a single PLD, separate PLDs of the same or different type can be used to implement
the NS and output forming logic. The idea here is to invoke the concept of "divide and
conquer." Such a scheme is shown in Fig. 13.47 for a Mealy FSM together with input and