Page 714 - Engineering Digital Design

680 CHAPTER 13 / ALTERNATIVE SYNCHRONOUS FSM ARCHITECTURES

the Stan signal. The count begins at the particular setting of the switches and
ends when the count reaches zero. The pulses are to be generated with active
clock by the Pulse output from the controller, and the counters are to count
with inactive clock on each rising edge of the Count command CNT from the
controller. An END(L) signal from the counters ends the count process when
zero has been reached. Make certain that the counters are loaded at least one
clock period before the CNT and Pulse signals are issued by the controller. Plan
to use four states for the controller design, and make certain that only one series
of pulses can be issued on a start command.
To design the BCD down counters, follow the example in Subsection 12.3.2,
but for a down count, and with asynchronous preset and clear override capability
as in Fig. 12.20. Let CNT(H) be the enabling input to the MSD counter, and
connect the two counters in series by connecting the BO(L) of the MSD counter
to the EN(H) of the LSD counter. Note that a pulse is never issued in the 0000
end state, and that any false data setting (1010 to 1111) must not result in pulse
generation.
(b) Construct a timing diagram of the results of part a assuming a count of 03. To
do this, include the waveforms for CK, START(H), LD(L), CNT(H), PULSE(H),
END(L), and present states A(H) and B(H).
13.20 An election between two competing candidates for mayor is to be held in a small
community of 752 registered voters. Design a voter booth tabulation system that
will tally the vote count on each of two competing candidates. The booth will show
an "Enter" light when not occupied. When the voter enters the booth and closes the
door, a Voter-in (VI) signal is sent to the controller, the "Enter" light is turned off,
and an "Occupied" light is turned on. This is accomplished by a motion detector
working in coordination with door and light switches (matters of no concern to this
design problem). Once in the booth with the door closed, the voter pushes one of
two switches for the candidate of his or her choice. When either button is pressed
a corresponding counter is incremented, and the door is automatically opened for
the voter to exit. The current count of each counter is stored in a register as a BCD
number ready to be presented later as a seven-segment display. If both buttons are
pressed simultaneously, neither counter is incremented and the door is opened. It
is not possible for a voter to vote twice while in the booth. Once the door is opened
and the voter exists the booth (VI), the process is ready to begin again. Assume
that the entrence to the voter booth is minitored in some way so as to prevent an
individual from voting more than once.
The block diagram for the controller is provided in Fig. P13.12(a) and the input
and output symbology is defined in Fig. P13.12(b). Take all inputs and outputs as
active high and note that the switch inputs Ba and Bb are presented to the controller
asynchronously from mechanical switches.
Design the controller for this system by using the one-hot-plus-zero approach,
and construct the functional partition for its operation. To do this, use RET D
flip-flops for the controller FSM, and RET cascaded BCD up-counters for the
count. In addition to the controller, plan to initialize the counters, registers and
the appropriate input conditioning circuits. Carefully consider how best to trigger
the registers relative to the counters and controller. Assume that the lights and