Page 124 - System on Package_ Miniaturization of the Entire System

Stacked ICs and Packages (SIP) 99

adhesive tape with one side thermally releasable. The carrier is removed by heating it
to between 90 and 150°C. Dissolvable glue is another widely used bonding material for
thin-wafer handling. Its spin-coating allows for very thin and uniform adhesive layers,
which is of the utmost importance when wafers of a final thickness are in the range of
10 μm. This method has also been shown to embed surface topography. Thin dies can
be released from the carrier without mechanical force by immersing the wafer into a
solvent bath that dissolves the glue. Ultraviolet (UV) sensitive bonding materials have
also been applied that can be released after UV laser irradiation through a transparent
glass carrier such as quartz [17]. However, these polymer-based bonding techniques are
limited to temperatures below 200°C. Further increased thermal stability is required to
allow process steps like sintering of back-side metal or plasma etching of dielectric
layers. A more advanced thin wafer handling concept is based on electrostatic forces,
which do not need any polymeric bonding materials [18]. Bonding and debonding of
thin wafers onto electrostatic carriers is achieved within a very short time, in a repeatable
manner, and without any constraints regarding surface contaminants from bonding
agents. It was also shown that this electrostatic attraction state remains active at
temperatures even above 400°C.
Thin-Wafer Dicing Singulation of thin wafers is another major process before stacking.
The current conventional wafer dicing process uses a diamond-bonded wheel to cut
through the full depth of the wafer and into the mounting tape. This mechanical dicing
method induces such problems as unacceptably high rates of chipping on the front and
back surfaces of the die, delamination of mechanically brittle layers such as low-k inter
layer dielectric (ILD), and the formation of microcracks. These cracks and chipping are
especially detrimental to thin chips. Several alternative dicing methods for thin dies are
being explored including dice before grind (DBG) [19] and laser singulation [20]. DBG
has been developed to reduce the breakage of ultrathin chips by chipping. The front
side of a wafer is partially diced before grinding and then the back side of the wafer is
ground, leading to separation into single dies. As the die is partially diced initially,
stress is relieved at the free edges of the die. However, DBG requires a special dicing
tool, increasing ownership costs and adding complexity to the process. Laser-based
dicing presents a simple dry process that minimizes the handling and processing of thin
wafers. No special tapes are necessary as the wafers are diced on standard polyolefin
tape, using standard wafer carriers. Laser dicing offers such benefits as minimal
chipping, high-yield, small kerf width, and high die strength. However, laser dicing
creates large heat-affected zones (HAZs), causing the low-k layer delamination and
cracking. To avoid this problem, water jet-guided laser dicing technology is being
developed, in which water can reduce the effect of HAZs [21].

Wire Bonded Stacking
The wire bonded stacking method uses the traditional wire bonding technique for the
vertical interconnection of stacked chips. Wire bonding is the most popular chip
interconnection method in chip stacking because of its existing low-cost infrastructure and
flexibility. This stacking technology has been used by a number of companies, including
Hitachi, Sharp, Amkor, Intel, and Hynix. Applications of this stacking technology are not
only for memory chip stacking such as DRAM, SRAM, and flash EPROMs for mobile
applications, but also for the heterogeneous chip stacking of logic and memory chips.
Wire bonded stacking is typically configured in a pyramid or overhang stacking
fashion with the same size dies or larger dies than the bottom one, as shown in