Page 128 - System on Package_ Miniaturization of the Entire System
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Stacked ICs and Packages (SIP)      103


                       The wire bonding process is particularly challenging when an upper die in a stack is
                    larger or overhangs a lower die. Bonding to an overhanging die can cause many problems,
                    including die cracks, loop damage, and inconsistent bump formation, due to die edge
                    bouncing. The maximal overhang length for a package depends on the application and
                    is determined by the die thickness, back-side die defect sizes, properties of the die
                    attachment layers, and the impact and bonding forces in the wire bonding process.

                    Die Adhesive  Two types of die adhesives are used in stacking chips: nonconductive
                    epoxy (NCE) and film adhesive (FA) [27]. NCE is generally lower cost and involves
                    minimal capital investment because it is used with existing die bonders. The weaknesses
                    of NCE processing, however, include control of voids, fillet coverage, epoxy bond-line
                    thickness control, and die tilt—all critical issues for successful die stacking. In addition,
                    resin bleed can contaminate die-bond pads and make wire bonding difficult. The FA
                    technology, on the other hand, can address the above process concerns associated with
                    using NCE in die-stacking applications. Because resin bleed is a major concern when
                    stacked dies are of the same size, the FA is the only workable option. In addition, FA
                    provides a uniform bond-line thickness that is void-free, with 100 percent edge coverage.
                    The FA also acts as a stress absorber between dies. The FA technology, however, requires
                    an initial capital investment in wafer-back lamination and die-bonder modifications,
                    and involves higher materials cost. The increasingly higher demand for higher quality
                    of die-stacking applications can offset these additional expenses.

                    Spacer Technology  Stacking of chips with varying die sizes requires a spacer between the
                    dies when the top die is either the same size or larger than the bottom die, to avoid damage
                    to its wires. Numerous spacer materials have been used, including silicon, adhesive paste,
                    and thick tape. Each presents advantages and shortcomings. Silicon is widely used because
                    of its acceptance, its infrastructure, and its cost-effectiveness. But it has more processing
                    steps. Epoxy with spacer spheres requires fewer process steps, but has more epoxy bleed.
                    Tape has no bleeding, but it is more costly. Epoxy with spacer spheres is preferred for a die
                    with a thickness < 100 μm, because it minimizes the overhanging span of the top of the die
                    and enables its wire bonding [28]. The use of spacers affects mold-cap thickness and total
                    package height. The process capability for controlling wire loop height and mold flow
                    dictates the spacer gap. A larger mold gap works against the trend to thinner package
                    height. Choosing a reasonable spacing gap is important for mold compound flow, since
                    turbulent mold compounds flow inside a mold cavity.

                    Molding  Increased wire density and wire length in wire bonded chip stacking makes
                    molding the stack more difficult than conventional single-die packages. Different layers
                    of wire bond loops that are subjected to varying amounts of drag force can result in
                    differences in wire sweep. This increases the possibility of wire shorts. Further, the
                    variable gaps between various die components make it more difficult in the molding
                    process to achieve a balanced flow without voids free. Molding compound development
                    and selection, as well as gate design and wire layout optimization, are required to
                    achieve a better yield in molding. Low-viscosity compounds and compounds with
                    smaller filler sizes and slower molding transfer speeds show improved wire sweeps. A
                    lateral loop trajectory is known to be able to reduce the mold sweep by predeforming
                    the wire in anticipation of the sweep direction [26]. The change in gate design from
                    conventional bottom-gate to top-center mold gate can also reduce the wire sweep,
                    especially for long wire applications [29].
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