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Mixed-Signal (SOP) Design 195

complex circuits. For design cycle time reduction, an automated top-down approach is
preferred where electrical specifications can generate layouts automatically. However,
with RF and mixed-signal circuits where a change of 0.1 dB or a frequency shift of
10 MHz can make the circuits unusable, the use of only a top-down approach will not
suffice and is also not practical. Therefore, the layouts generated in Level 3 need to be
modified and the information passed back to Levels 2 and 1 to ensure that the design
meets specifications. Hence, a continuous feedback loop is required between the three
levels. This translates into design cycle time, and oftentimes fast simulators are required
to ensure that the time required for the iterative process can be minimized. Electronic
design automation (EDA) tools that enable both a top-down and bottoms-up approach
for the design of SOP-based systems are described in the following sections.

4.5.1 Circuit Sizing of Embedded RF Circuits
Circuit sizing is the process of extracting network- and layout-level parameters for a
component or circuit from electrical specifications. It is common in digital designs and
is being increasingly used in low-frequency analog circuits. The main reason for this is
the scalability of design cells that allows an automated hierarchical design flow. RF
designs, however, lack this scalability due to the effects of layout-level parasitics and
coupling on circuit performance. A conventional design flow tries to optimize circuit
performance at the layout level at the premium of time-consuming electromagnetic
iterations for entire circuit layouts. In contrast, a sizing approach can be used to extract
physical dimensions of the layout from the electrical specifications by using intermediate
steps consisting of circuit-level models, optimization methods, and mapping. In the
following section, we consider the design of inductors and filters using such an
approach.

Sizing of Inductor Layouts
A. Use of Artificial Neural Networks—Forward Mapping Artificial neural networks (ANNs)
have emerged as a powerful alternative to numerical and analytical modeling techniques.
A typical neural network consists of weighting functions that are adjusted during
training to enable it to map highly nonlinear input-output relationships through a
combination of activation states of the neural layers [55]. Multilayer feed-forward
perceptrons can be used to implement the neuromodels for RF circuits. In forward
mapping, the geometrical parameters of an inductor are mapped to the electrical
parameters. This requires a coarse library of inductors with stepwise variations in
layout parameters, which can be generated using any electromagnetic simulator. The
generated data are used for training and testing the neural network. An initial sensitivity
analysis can be performed to identify the dominant geometrical parameters affecting
the inductance parameters (L, Q, and self resonance frequency (SRF) at any frequency),
which are the typical electrical parameters for an inductor. The majority of the data (up
to 80 percent) can be used for training the neural network, while the remaining data can
be used for model validation. The number of hidden layers in the neural network
structure is adjusted in order to have moderate training as well as limit validation
errors. Based on the accuracy of component values required by the design specifications,
the ANN-based model can be sampled to further populate the coarse data using
interpolation methods. This is possible due to the piecewise monotonicity of the data
obtained for inductors for parameters such as L, Q, and SRF as a function of the dominant
geometrical parameters [55].