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Intr oduction to System-on-Chip (SOC)     61



                                      Time to                              Volume
                                     Working     Development  BOM Cost    Breakover   Time-to-
                                      Silicon       Cost      Reduction     Point    market
                Non-platform-based   2–3 years   $10 million  $40        250,000     3 years
                90-nm SOC
                Cell-based,        6–9 months    $4 million   $40        100,000     1 year
                platform-based SOC

               Source: Toshiba America Electronic Components, Inc.

               TABLE 2.2  Benefits of Platform-based SOC Design



                    moves up from just an IP level, which was described earlier, to a HW-SW components
                    level reuse. On the other hand, one of the key drawbacks of a platform approach is the
                    need for a larger up-front investment in terms of both the man-month effort required to
                    deliver a platform as well as the complexity involved. This means that there needs to be
                    a lot of careful early planning and analysis, particularly at the architectural level. All
                    hardware and software platform components need to be preverified all the way to
                    silicon, and this adds to the up-front cost as well. We will describe more of these
                    challenges and careabouts while discussing design abstraction levels in the next
                    section.
                       The platform-based design development working group of the VSIA Consortium
                    has been working for a while to determine a clear set of platform attributes in order to
                    provide a definition for the platform taxonomy. The two major kinds that have emerged
                    are the “application-driven” and “technology-driven” platforms as shown in Figure 2.14.
                    In the application-driven scenario, different architectural-level families are defined
                    from certain application domains and a product line family typically gets created. A
                    top-down process instantiates the required preverified hardware and software IP
                    modules, and application-specific derivative products are integrated and built on a
                    single chip. This process is independent of the process technology that is used to build
                    such systems. In contrast, a technology-driven platform is built bottom-up with the
                    need to either extend the functionality or performance, or to migrate the design to later
                    technologies, irrespective of the application requirements.

                    SOC Verification
                    The functional verification of an SOC has two components, firstly to verify whether the
                    implementation meets the specification and secondly to verify that the specification
                    meets the true intent of the system functionality. Since the system functionality is
                    realized by the software running on the processors embedded in an SOC, HW-SW
                    coverification is an important component of SOC verification. In addition to the software
                    delivered as part of the system solution, the software development environment also
                    needs to be provided so that customers and users can develop and integrate differentiated,
                    value-added software. It’s thus important to verify that the appropriate hardware hooks
                    (for debug for example) required for the software development are functioning as
                    desired. Figure 2.15 captures the software environment around an SOC with embedded
                    processor(s). This includes both the software components that run on the SOC and also
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