Page 274 - Sami Franssila Introduction to Microfabrication

Process Integration 253

6. Which methods can you use for the following 11. If Al (2% wt. Cu) lines have MTF of 400 hours
◦
measurement tasks: at 255 C, what is their expected lifetime under
– oxide pinhole density; standard operating conditions?
– thickness of nominally 30 nm thick titanium; 12. A micromechanical air gap parallel plate capacitor
2
– photoresist thickness uniformity; (Figure 24.7(a)) has 1 mm area and 1 µm air gap.
What is the capacitance? If femtofarad capacitance
– sputtered aluminium step coverage;
change can be measured, what is the corresponding
– implanted arsenic dose;
displacement of the movable capacitor plate?
– particle removal efficiency in NH 4 OH/H 2 O 2
wet cleaning;
– Ta 2 O 5 film deposition; REFERENCES AND RELATED READINGS
– ion implantation of boron into a phosphorous Chen, C.K. et al: Ultraviolet, visible, and infrared response
doped wafer; of PtSi Schottky-barrier detectors operated in the front-
– silicon dioxide thinning in etching; illuminated mode, IEEE TED, 38 (1991) 1094, fig. 2.
– mask oxide undercutting in KOH etching of Fair, R.B., Conventional and rapid thermal processes, in
C.Y. Cheng & S.M. Sze (eds.): ULSI Technology, McGraw-
<100> silicon;
Hill, 1996.
– copper electroplating; Gardner, D.S. & Flinn, P.A.: Mechanical stress as a function
– photoresist sidewall angle. of temperature in aluminum films, IEEE TED, 35 (1988),
7. DRAM trench capacitors are cylindrical holes 2160.
with high aspect ratios. What is the aspect ratio Hu, C.-K. et al: Electromigration of Al(Cu) two-level struc-
in a 0.15 µm linewidth process if the capaci- tures: effect of Cu kinetics of damage formation, J. Appl.
Phys., 74 (1993), 969.
tor oxide thickness is 5 nm and capacitance is
Hu, C.-K.: Electromigration failure mechanism in bamboo-
40 fF? grained Al(Cu) interconnections, Thin Solid Films, 260
8. Capacitor nitride deposition uniformity across the (1995a), 124
wafer is ±1%, and across the batch it is ±2%. Hu, C.-K. et al: Electromigration and stress-induced voiding in
The top electrode area is defined by etching the fine Al- and Al-alloy thin-film lines, IBM J. Res. Dev., 39
(1995b), 465.
CVD oxide (thickness and etch non-uniformity
Istratov, A.A. et al: Advanced gettering techniques in ULSI
±5%) against the capacitor nitride. If the oxide
technology, MRS Bull., 25(6) (2000), 33.
thickness is 200 nm and nitride thickness is 10 nm, Leslie, T. et al: Photolithography overview of 64 Mbit produc-
plot the capacitance variation as a function of the tion, Microelectron. Eng., 25 (1994), 67.
oxide:nitride etch selectivity. Muller, T. et al: Assessment of silicon wafer material for the
9. Redo Exercise 9.3, this time for 5X step-and-repeat fabrication of integrated circuit sensors, J. Electrochem. Soc,
147 (2000), 1604–1611.
lithography and quartz masks.
Schr¨ oder, D.K.: Semiconductor Material and Device Charac-
10. If the TiW/Al (50 nm/400 nm) line experiences nd
terization, 2 ed., John Wiley & Sons, 1998.
a void in aluminium, how much will the line Yue, J.T., Reliability, in C.Y. Cheng & S.M. Sze (eds.): ULSI
resistance increase? Technology, McGraw-Hill, 1996.