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cyclical, and long-term trends are easily camouflaged B¨ uhling, S. et al: Resolution enhanced proximity printing by
by annual or quarterly fluctuations. phase and amplitude modulating masks, J. Micromech.
More complex devices are introduced at regular Microeng., 11 (2001), 603.
intervals, which means that the R&D effort must grow Chang, L. et al: Moore’s law lives on, IEEE C & D, 1 (2003),
for each successive device generation: development 35.
of the 1 Mbit DRAM has been estimated to have Doris, B. et al: Extreme scaling with ultra-thin Si channel
cost $200 million, for 1 Gbit DRAM it is estimated at MOSFETs, IEDM 2002 (2002), p. 267.
$1.5 billion. So far the market size has grown steadily, Fritze, M. et al: Enhanced resolution for future fabrication,
IEEE C & D Mag., 1 (2003), p. 43.
which means that there have always been customers Henderson, R.: Of life cycles real and imaginary: the unex-
for more memory and more processing power, and
pectedly long old age of optical lithography, Res. Policy, 24
therefore, the interval between introductions of new (1995), 631.
generations has been steady. Hisamoto, D. et al: FinFET- a self-aligned double-gate MOS-
FET scalable to 20 nm, IEEE TED, 47 (2000), 2320.
Hoyt, J.L. et al: Strained silicon MOSFET technology, IEDM
38.7 EXERCISES 2002 (2002), p. 23.
Huff, H.R.: From the lab to the fab: transistors to integrated
1. The price per bit has been scaled down at a rate of
circuits, Electrochemical Society Proceedings ULSI Process
ca. 30%/year. If 512 Mbyte of DRAM memory cost
Integration III (2003), p. 15.
ca. $100 in 2003, how much will it cost in 10 years?
ITRS, International Technology Roadmap for Semiconductors,
2. How far from fundamental limits are metallization http://public.itrs.net/HomeStart.htm.
RC time delays? Iwai, H.: Outlook of MOS devices into next century, Micro-
3. Given the scaling trend predicted by Moore’s law, electron. Eng., 48 (1999), 7.
when will CMOS gate oxide be one atomic diame- Jeong, H. et al: Optical projection system for gigabit DRAM,
ter thick? J. Vac. Sci. Technol., B11 (1993), 2675.
4. The price of the refractive lens used in a wafer Keyes, R.W.: Fundamental limits of silicon technology, Proc.
stepper has increased rapidly over the years: $25 000 IEEE, 89 (2001), 305 (special issue on limits of semicon-
in 1986, $102 000 in 1989, $294 000 in 1992, ductor technology).
$670 000 in 1995 and $1.5 million in 1998. What is Kilby, J.: The invention of the integrated circuit, IEEE TED,
the price of a stepper lens today? Data from Jeong, H. 23 (1976), 648.
et al: Optical projection system for gigabit DRAM, Moore, G.: Cramming more components onto integrated cir-
J. Vac. Sci. Technol., B11 (1993), 2675. cuits, Electronics, 38 (1965) (available at http://www.
intel.com/research/silicon/mooreslaw.htm).
5. The DRAM memory cell for one bit takes up an area Park, J.-T. & Colinge, J.-P.: Multiple-gate SOI MOSFETs:
2
of 8F , where F is the lithographic pitch. What is the device design guidelines, IEEE TED, 49 (2002), 2222.
chip size of a 1 Gbit DRAM? Ross, I.: The foundations of the silicon age, Bell Labs Tech. J.,
2 (1997), 3 (50 th anniversary issue of the invention of the
transistor).
REFERENCES AND RELATED READINGS
Tuomi, I.: The Lives and Death of Moore’s Law, http://
Anand, M.B. et al: Use of gas as a low-k interlayer dielectric firstmonday.org/issues/issue7 11/tuomi/index.html.
in LSI’s: demonstration of feasibility, IEEE TED, 44 (1997), Wagner, C. et al: The technical considerations of extending
1965. optical lithography, Solid State Technol. (2000), 97.
Asenov, A. et al: Simulation of intrinsic parameter fluctuations Wong, H.-S.P.: Beyond the conventional transistor, IBM J. Res.
in decananometer and nanometer-scale MOSFETs, IEEE Dev., 46 (2002), 133 (special issue “Scaling CMOS to the
TED, 50 (2003), 1837 (special issue on nanoelectronics). limit”).
Buchanan, M.: Scaling the gate dielectric: materials, integra- Proc. IEEE, 74(12) (1986), special issue on integrated circuit
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