Page 28 - MEMS Mechanical Sensors

2.3 Fabrication Techniques 17

tensile and is determined by the process. Typically this is up to 300 MPa. Control
over this stress can only be exercised in PECVD deposition.

2.3.1.7 Metals
Although metals can be deposited by CVD, evaporation, e-beam evaporation, or
plasma spray deposition, sputtering is the technique commonly used in integrated
circuit processing. It is also safe to say that the metal predominantly used is alumi-
num, usually with a few percent silicon and/or copper added. The thickness of the
metal is of the order of 1 µm and is usually deposited on thin layers, such as Ti, to
improve adhesion, and barrier layers, such as TiN, to prevent diffusion. The stress
in sputtered films is, in general, tensile, with the actual value depending on the pres-
sure in the sputtering chamber and the temperature of the substrate.

2.3.1.8 Doped Silicon
Dopants are introduced into silicon either by ion implantation, during epitaxial
growth, or by diffusion from solid or gaseous sources. Ion implantation is done by
firing energetic ions directly into the silicon. After implantation, the silicon wafers
have to undergo a thermal treatment, first, to anneal damage to the crystal caused
by the impact of the energetic ions, and second, to move the dopant atoms into sub-
stitutional sites in the silicon crystal where they become electrically active. Doping
during epitaxial growth is achieved by adding the appropriate gases, such as arsine,
phosphine, or diborane, to the epitaxy growth chamber. Diffusion is done in a fur-
nace at elevated temperatures in the range 800°C to 1,200°C. In all of these cases
silicon dioxide can be used to create a two-dimensional spatially distributed pattern
of doped silicon. The depth and the doping profile of the atoms introduced into the
silicon depend on the exact conditions used. For MEMS mechanical sensors, ion
implantation is usually used when a shallow doping profile is required as, for exam-
ple, for piezoresistors. When a deeper doping profile is required—such as that
required for the etch stop process discussed later in this chapter—then diffusion in a
furnace is the obvious choice. Doping silicon to depths of up to ∼10 µm can be
achieved by diffusion. Beyond this, epitaxial growth of a doped layer of silicon is the
only option.

2.3.2 Lithography
Lithography is the process by which patterns are formed in a chemically resistant
polymer, applied by spinning it on to the silicon wafer. In optical lithography this
polymer, called resist, is exposed to UV light through a quartz mask with an opaque
patterned chrome layer on it to either break or link the polymer chains. The former
is called positive resist and the latter negative resist. After exposure the soluble resist
(the broken polymer chains in positive resist or the unlinked polymer chains in nega-
tive resist) is removed in developer and the remaining resist is baked in order to
harden it against chemical attack. In integrated circuit processing the typical thick-
ness of an optical resist is 1 µm and exposure is done with a wafer stepper. With
state-of-the-art equipment, feature sizes of the order of 100 nm can be obtained.