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                   54                        MEMS and Microstructures in Aerospace Applications


                   is conformable and will deposit on the inside wall of the hub structure. The
                   thickness of SACOX2 defines the clearance of the hub structure. SACOX2 can
                   also be used as a hard mask to define MMPOLY1 using the subsequent etch that
                   also defines MMPOLY2.
                       Upon completion of the SACOX2 deposition, pattern, and etch, a 1.5-mm thick
                   layer of doped polysilicon, MMPOLY2 is deposited. Any MMPOLY2 layer ma-
                   terial that is deposited directly upon MMPOLY1 (i.e., not separated by SACOX2)
                   will be bonded together. Following the MMPOLY2 deposition, an anisotropic
                   reactive ion etch is performed to etch MMPoly2 and composite layers of
                   MMPOLY1 and MMPOLY2 (laminated together to form a single layer 2.5-mm
                   thick). The MMPOLY2 etch will stop on silicon dioxide, hence MMPOLY1 will be
                   protected by any SACOX2 on top of MMPOLY1 and the SACOX2 layer can be
                   used as a hard mask to define a pattern in MMPOLY1.
                       At this point in the SUMMiT V process all the layers have been conformable
                   (i.e., assume the shape of the underlying patterned layers). To enable the addition
                   of subsequent structural and sacrificial levels without the fabrication and design
                   constraints of the conformable layers, CMP is used to planarize the sacrificial
                   oxide layers. With the MMPOLY2 etch complete, approximately 6 mm of TEOS
                   (tetraethoxysilane) silicon dioxide (SACOX3) is deposited. CMP is used to planar-
                   ize the oxide to a thickness of about 2 mm above the highest point of MMPOLY2.
                   Following planarization, SacOx3 is patterned and etched to provide dimples
                   and anchors to the MMPOLY2 layer using the DIMPLE3_CUT and SACOX3_
                   CUT masks, respectively. The DIMPLE3_CUT etch is performed by etching all
                   the way through the SACOX3 layer, stopping on MMPOLY2. Then 0.4 mmof
                   silicon is deposited to backfill the dimple hole to provide the 0.4 mm standoff
                   distance. The processing of the DIMPLE3 feature will provide a repeatable standoff
                   distance.
                       A2-mm thick layer of doped poly (MMPoly3) is deposited on the CMP
                   planarized SACOX3 layer. The MMPOLY3 layer will be flat and not have the
                   topography due to the patterning of the underlying layers. This will ease design
                   constraint on the higher levels and enhance the use of MMPOLY3 and MMPOLY4
                   layers as mirror surfaces in optical applications. The MMPOLY3 layer is patterned
                   and etched using the MMPOLY3 mask.
                       The processing for the SACOX4 and MMPOLY4 layers proceeds using the
                   SACOX4_CUT, DIMPLE4_CUT, and MMPOLY4 mask in an analogous fashion to
                   the SACOX3 and MMPOLY3 layers, except that the DIMPLE4 standoff distance is
                   0.2 mm.
                       Release and drying of the SUMMiT V die are the final fabrication steps. The
                   device is released by etching all the exposed silicon dioxide away with a 100:1
                   HF:HCl wet etch. Following the wet release etch, a drying process can be employed
                   using either simple air evaporation, supercritical CO 2 drying, 27  or CO 2 freeze
                   sublimation. 28  The choice of the drying process will depend upon the design of
                   the particular devices. Structures that are very stiff will be less sensitive to the
                   surface tension forces, and they can be processed by simple air drying. Supercritical
                   CO 2 drying processing for large devices is a better option.




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