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482     CHAPTER 10 / INTRODUCTION TO SYNCHRONOUS STATE MACHINE DESIGN


                    CK_process: process;
                    begin
                    wait until (CK'event and CK = T);
                                       if Sanity = '0' then -- '0' represents LV
                                       state <= stateO;
                                else state <= NS;
                                end if;
                           end process CK_process;
                    end behavorial;

                       In this example the effect of the Sanity input is presented at the end of the behavioral
                    description. But it could have been placed in front of the sequence_process. Also, a keyword
                    not encountered in all previous examples is type. This keyword is used to declare a name and
                    a corresponding set of declared values of the type. Usages include scalar types, composite
                    types, file types, and access types. References on the subject of VHDL are cited in Further
                    Reading at the end of Chapter 6.


                    10.15  FURTHER READING

                    Nearly all texts on the subject of digital design offer coverage, to one extent or another, of flip-
                    flops and synchronous state machines. However, only a few texts approach these subjects by
                    using fully documented state (FDS) diagrams, sometimes called mnemonic state diagrams.
                    The FDS diagram approach is the simplest, most versatile, and most powerful pencil-and-
                    paper means of representing the sequential behavior of an FSM in graphical form. The text
                    by Fletcher is believed to be the first to use the FDS diagram approach to FSM design. Other
                    texts that use FDS diagrams to one degree or another are those of Comer and Shaw. The
                    text by Tinder is the only text to use the FDS diagram approach in the design and analysis
                    of latches, flip-flops, and state machines (synchronous and asynchronous). Also, the text
                    by Tinder appears to be the only one that covers the subject of K-map conversion as it is
                    presented in the present text.

                     [ 1 ] D. J. Comer, Digital Logic and State Machine Design, 3rd ed. Saunders College Publishing, Fort
                        Worth, TX, 1995.
                     [2] W. I. Fletcher, An Engineering Approach to Digital Design. Prentice Hall, Englewood Cliffs,
                        NJ, 1980.
                     [3] A. W. Shaw, Logic Circuit Design. Sanders College Publishing, Fort Worth, TX, 1993.
                     [4] R. F. Tinder, Digital Engineering Design: A Modern Approach. Prentice Hall, Englewood Cliffs,
                        NJ, 1991.

                       The subjects of setup and hold times for flip-flops are adequately treated in the texts by
                    Fletcher (previously cited), Katz, Taub, Tinder (previously cited), Wakerely, and Yarbrough.
                     [5] R. H. Katz, Contemporary Logic Design. Benjamin/Commings Publishing, Redwood City, CA,
                        1994.
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