Page 140 - System on Package_ Miniaturization of the Entire System
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FIGURE 3.41 A cross-sectional view of a four-chip PoP on a mobile handset. [45]
Metallization
Package 1
Bare die
Package 2
Substrate
Solder
(a) (b)
(c)
FIGURE 3.42 Variations of PoP stacking by (a) embedded solder interconnection [46], (b) area array
interconnection [47], and (c) side-metallization [48].
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