Page 108 - Rashid, Power Electronics Handbook
P. 108

94                                                                                            I. Batarseh

               I BS  and from the bulk to the drain I BD  are simply diode  It was decided that the device should have a blocking
               currents and are given by                            voltage (V DSS ) of 600 V and drain current i of 3.6 A. The
                                                                                                         d
                                          V BS                      device selected is IRF CC30 with case TO220. This device is
                                I  ¼ I  e  ÿ V T ÿ 1         ð6:44Þ
                                 BS   SS                            listed in the PSpice library under model number IRFBC30 as
                                           V BD                     follows:
                                          ÿ
                                I BD  ¼ I DS  e  V T ÿ 1     ð6:45Þ
                                                                    *Library of Power MOSFET Models *Copyright
               Where I SS  and I DS  are the substrate source and substrate drain  OrCAD, Inc. 1998 All Rights Reserved. *
               saturation currents. These currents are considered equal and  *$Revision:  1.24  $  *$Author:  Rperez  $
               given as I in the MODEL statement with a default value of  *$Date: 19 October 1998 10:22:26 $ * .
                       S
               10 ÿ14  A. Where the equation symbols and their corresponding  Model IRFBC30 NMOS NMOS
               PSpice parameter names are shown in Table 6.1.
                                                                      The PSpice code for the MOS device labeled S1 used in Fig.
                 In PSpice, a MOSFET device is described by two statements,
                                                                    6.27 is given by
               with ®rst statement starting with the letter M and the second
               statement starting with .Model, which de®nes the model used  MS13500 IRFBC30 .MODEL IRFBC30
               in the ®rst statement. The following syntax is used:  .Model IRFBC30 NMOS(Level=3 Gamma=0
                                                                    Delta=0 Eta=0 Theta=0 Kappa=0.2
               M<device_name> <Drain_node_number>
                                                                    Vmax=0 Xj=0 + Tox=100n Uo=600 Phi=.6
               Gate_node_number>
                                                                    Rs=5.002m Kp=20.43u W=.35 L=2u
               <Source_node_number> <Substrate_node
                                                                    Vto=3.625 + Rd=1.851 Rds=2.667MEG
               number> <Model_name> *
                                                                    Cbd=790.1p Pb=.8 Mj=.5 Fc=.5
               [<param_1>=<value_1>
                                                                    Cgso=1.64n + Cgdo=123.9p Rg=1.052
               <param_2>=<value_>....]       .MODEL
                                                                    Is=720.2p N=1 Tt=685) * Int'l Recti®er
               <Model_name> <type_name>
                                                                    pid=IRFCC30 case=TO220
               [ (<param_1>=<value_1>
               <param_2>=<value_2> .....]
                                                                    6.7.2 Large Signal Model
                 Where the starting letter "M" in M<devic_name> state-
               ment indicates that the device is a MOSFET and <device_  The equivalent circuit of Fig. 6.28 includes ®ve device parasitic
               name> is a user speci®ed label for the given device, the  capacitances. The capacitors C , C , and C GD , represent the
                                                                                             GB
                                                                                                 GS
               <Model_name> is one of the hundreds of device models  charge-storage effect between the gate terminal and the bulk,
               speci®ed in the PSpice library; and <model_name> or the  source and drain terminals, respectively. These are nonlinear
               same name speci®ed in the device name statement <type_  two-terminal capacitors expressed as functions of W, L Cox,
               name>, is either NMOS of PMOS, depending on whether the  V , V , V , and C GB0 , C GSO , C GDO . Capacitors C GB0 , C GS0 ,
                                                                          T0
                                                                     GS
                                                                              DS
               device is n-or p-channel MOS, respectively. An optional list of  and C GD0  outside the channel region, are known as overlap
               parameter types and their values follows. Length L and width  capacitances that exist between the gate electrode and the
               W and other parameters can be speci®ed in the M<device_  other three terminals, respectively. Table 6.2 shows the list of
               name>, in the .MODEL or .OPTION statements. A user may  MOSFET capacitance parameters and their default values.
               select not to include any value, and PSpice will use the speci®ed  Notice that the PSpice overlap capacitor keywords (C GB0 ,
               default values in the model. For normal operation (physical  C GSO , C GDO ) are proportional either to the MOSFET width
               construction of the MOS devices), the source and bulk substrate  or length of the channel as follows:
               nodes must be connected together. In all the PSpice library ®les,
                                                                                      C    ¼ C   =L
               defaultparametervaluesforL,W,AS,AD,PS,PD,NRD,andNDS                     GBO    GBO
               areincluded,andauserthenshouldnotspecifysuchvaluesinthe                C GSO  ¼ C GSO =W           ð6:46Þ
               device ‘‘M''statement or in the OPTION statement.
                                                                                      C    ¼ C   =W
                 The power MOSFET device PSpice models include relatively              GDO    GDO
               complete static and dynamic device characteristics given in the
                                                                    In the triode region, where v GS  > v DS  ÿ V , the terminal
                                                                                                         Th
               manufacturing data sheet. In general, the following effects are
                                                                    capacitors are given by,
               speci®ed in a given PSpice model: dc transfer curves, on-
                                                                                                          2
               resistance, switching delays, gate dive characteristics, and               v GS  ÿ v DS  ÿ V Th
                                                                        C  ¼ L C    1 ÿ                     þ C   :
               reverse-mode ‘‘body-diode'' operation. The device character-  GS  W  oX   2ðv GS  ÿ V Þÿ V DS    GS0
                                                                                                 Th
               istics that are not included in the model are noise, latch-ups,
                                                                                                         2
                                                                                            v  ÿ V
               maximum voltage, and power ratings. Please see OrCAD    C GD  ¼ L C oX  1 ÿ   GS   Th       þ C GDO :
                                                                              W
               Library Files.                                                            2ðv GS  ÿ V ðÿv DS
                                                                                                 Th
                                                                        C GB  ¼ C GB0 L
                  EXAMPLE 6.3.  Let us consider an example that uses IRF
                  MOSFET and connected as shown in Fig. 6.27.                                                     ð6:47Þ
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